ECE Lab Report essays

ECE Lab Report essays In this experiment, we constructed a circuit that was connected to a 7-panel writing board. The 6 inputs from the circuit were hooked up to the corresponding pins on the XS40 FPGA board. Then 6 outputs from the corresponding pins on the XS40 FPGA board were then connected to a ribbon cable that was connected to a computer. When the circuit was complete, we wrote a program in C++ to interface the hardware with the PC using its parallel-I/O port. The program was then improved to implement a calculator interface and performed mathematical operations. There were 15 different combinations on writing panel, which corresponded to 10 different digits, 4 different operands, and an equal sign. Writing panel: it is consisted of 7 metallic panels. Each panel is soldered to a wire, which is connected to the D-latch. The writing panel is used for the user to input the combination of the corresponding number, operand, and equal sign. 7474 D-latch: four chips were used during this lab because we need 7 inputs (Preset). Each panel from the writing board is connected to the PRE on the D-latch to set the state, 1 being used and 0 being unused. Three of four D-latches CLRs were all connected to together in order to clear the writing panel when it is grounded; moreover, all CPs and Ds were grounded. XS40 FPGA board: it used to run VHDL program I/O Port: Port A is connected to the 6 outputs from the XS40 FPGA board, D-latch from the 4th D-latch chip, and the last used PIN being grounded. Port B is connected to the common RESET. I/O port is then attached by a ribbon cable from the computer. This configuration is simply to send inputs to the computer, where a calculator program is implemented. Once a digit, an operand, or an equal sign has been entered, it is sent to the computer and then the computer will automatically clear the writing panel through Port B to RESET. Circuit Diagram and Block Diagram ...